Publications / Collaboration
Co-authored papers
Additional research collaborations across RTL generation, circuit models, verification, and design automation.
2026
AssertLLM2: A Comprehensive LLM Benchmark for Assertion Generation from Design Specifications
IEEE/ACM International Conference on Computer Aided Design
Dr. RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvement
IEEE/ACM International Conference on Computer Aided Design
ComPart: Community-Guided Post-Coarsening for High-Quality Hypergraph Partitioning
ACM/IEEE Design Automation Conference
IMPart: Integration of Memetic Operations into Multi-Level Framework for Large-k-Way Hypergraph Partitioning
ACM/IEEE Design Automation Conference
A Self-Supervised and Cross-Design Netlist Power Model for Time-Based Layout Power Analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2025
SynC-LLM: Generation of Large-Scale Synthetic Circuit Code with Hierarchical Language Models
Conference on Empirical Methods in Natural Language Processing
GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignment
IEEE/ACM International Conference on Computer Aided Design
ATLAS: A Self-Supervised and Cross-Stage Netlist Power Model for Fine-Grained Time-Based Layout Power Analysis
ACM/IEEE Design Automation Conference
CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design
International Conference on Learning Representations
RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems